Open CMOS SPICE Model Collections

About

Collections of open CMOS SPICE models

Project Web: https://github.com/DDD-FIT-CTU/CMOS-SPICE-Model-Collections

Related publications

1. Belohoubek, J., Fiser, P., & Schmidt, J. (2020, April). Standard Cell Tuning Enables Data-Independent Static Power Consumption. 23rd International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2020). bibtex | manuscript | slides | video
   Cited by:
   1. Fadaeinia, B., Moos, T., & Moradi, A. (2020). BSPL: Balanced Static Power Logic. IACR Cryptol. EPrint Arch., 2020, 558.
   2. Fadaeinia, B., Moos, T., & Moradi, A. (2021). Balancing the Leakage Currents in Nanometer CMOS Logic—A Challenging Goal. Applied Sciences, 11(15), 7143.